Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2005-05-31
2005-05-31
Lebentritt, Michael S. (Department: 2824)
Static information storage and retrieval
Addressing
Multiple port access
C365S051000, C365S072000, C365S063000
Reexamination Certificate
active
06901024
ABSTRACT:
A multi-port semiconductor memory device includes a plurality of memory cells, each having a first bitline pair and a second bitline pair, and a plurality of flipped memory cells, each having a first flipped bitline pair and a second flipped bitline pair. The memory cells and the flipped memory cells are alternately arranged in a row direction, and a predetermined preparatory memory cell is arranged between the memory cell and the flipped memory cell that are adjacent to each other at a predetermined position in the row direction. In particular, the preparatory memory cell connects the first bitline pair of the memory cell to the second bitline pair of the flipped memory cell and connects the second bitline pair of the memory cell to the first bitline pair of the flipped memory cell.
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Lee Chan-ho
Lee Young-keun
Hur J. H.
Lebentritt Michael S.
Mills & Onello LLP
Samsung Electronics Co,. Ltd.
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