Multi-port memory device and method of controlling the same

Static information storage and retrieval – Addressing – Multiple port access

Reexamination Certificate

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Details

C365S233100

Reexamination Certificate

active

07369453

ABSTRACT:
A multi-port memory device providing various frequencies for ports is disclosed. The multi-port memory device includes a memory core, a clock generator and a plurality of ports. The clock generator generates an internal clock signal based on an external clock signal. Each of the ports has a local clock generator that generates a local clock signal having a predetermined frequency based on the internal clock signal and accesses the memory core in response to the local clock signal. The multi-port memory device may generate various frequencies for ports without increasing the number of pins for receiving clock signals.

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patent: 5959937 (1999-09-01), Randolph et al.
patent: 6157990 (2000-12-01), Randolph et al.
patent: 6229368 (2001-05-01), Lee
patent: 6256256 (2001-07-01), Rao
patent: 2002-197864 (2002-07-01), None
patent: 10-2000-0018316 (2000-04-01), None
patent: 10-2002-0050092 (2002-06-01), None

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