Multi-path accessible semiconductor memory device with...

Details Multi-path accessible semiconductor memory device with... Multi-path accessible semiconductor memory device with...

2008-05-09

2011-10-04

Kim, Matt (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S104000, C711S149000, C711S150000, C711S151000, C711S152000, C711S153000

Reexamination Certificate

active

08032695

ABSTRACT:
A multiprocessor system includes first and second processors and a multi-path accessible semiconductor memory device including a shared memory area and a pseudo operation execution unit. The shared memory area is accessible by the first and second processors according to a page open policy. The pseudo operation execution unit responds to a virtual active command from one of the first and second processors to close a last-opened page. The virtual active command is generated with a row address not corresponding to any row of the shared memory area. For example, bit-lines of a last accessed row are pre-charged for closing the last-opened page.

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