Multi-level cache system with simplified miss/replacement...

Details Multi-level cache system with simplified miss/replacement... Multi-level cache system with simplified miss/replacement...

2006-02-28

2006-02-28

Vital, Pierre M. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S156000

Reexamination Certificate

active

07007135

ABSTRACT:
A multi-level cache system includes a primary cache and a secondary cache that is accessed by a processor later than the primary cache. If the secondary cache is full with data when the processor misses the access to the primary and secondary cache memories, data stored in the secondary cache must be routed to a main memory. In this case, to satisfy the inclusion property of cache, the data migrating to the main memory from the secondary cache is present in the secondary cache, not in the primary cache. The multi-level cache system does not need to access the primary cache to select the data in the secondary cache but not in the primary cache. Thus, it simplifies a logical composition for controlling the miss/replacement, and shortens an operation time therein.

REFERENCES:
patent: 5729712 (1998-03-01), Whittaker
patent: 6000015 (1999-12-01), Whittaker
Cache Directory for Least Recently Used Replacement Algorithm, IBM Technical Disclosure Bulletin, vol. 23, No. 10, Mar. 1, 1981, pp 4544-4545.
“Computer Architecture a Quantitative Approach,” Memory-Hierarchy Design, pp. 380-383.

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