Multi-code LDPC (low density parity check) decoder

Details Multi-code LDPC (low density parity check) decoder Multi-code LDPC (low density parity check) decoder

2011-08-30

2011-08-30

Tabone, Jr., John J (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S800000, C714S801000, C714S807000

Reexamination Certificate

active

08010881

ABSTRACT:
Multi-code LDPC (Low Density Parity Check) decoder. Multiple LDPC coded signals can be decoded using hardware provisioned for a minimum requirement needed to decode each of the multiple LDPC coded signals. In embodiments where each LDPC matrix (e.g., employed to decode each LDPC coded signal) includes a common number of non-null sub-matrices, then a same number of memories are employed when decoding each LDPC coded signal. However, those particular memories employed can be different subsets for when decoding each LDPC coded signal. In embodiments where each LDPC code includes a different number of non-null sub-matrices within its respective LDPC matrix, then a different number of memories are employed when decoding each LDPC coded signal. Various degrees of parallelism in decoding can also be employed in which different numbers of bit engines and check engines can be employed when decoding different LDPC coded signals.

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