Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2011-06-07
2011-06-07
Rizk, Sam (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S758000
Reexamination Certificate
active
07958424
ABSTRACT:
A multi-channel decoder system has a decoder core at least a portion of which is configurable as a LDPC decoder that, during decoding processing, divides check nodes of a node representation of a LDPC code into a plurality of groups, and, during an iteration, sequentially processes the groups while processing in parallel the check nodes within each group, thus improving decoding throughput.
REFERENCES:
patent: 6404828 (2002-06-01), Kaewell, Jr.
patent: 6539367 (2003-03-01), Blanksby et al.
patent: 6633856 (2003-10-01), Richardson et al.
patent: 7127664 (2006-10-01), Nicol et al.
patent: 7143336 (2006-11-01), Moon et al.
patent: 7179691 (2007-02-01), Lee et al.
patent: 7206364 (2007-04-01), Miller
patent: 7231577 (2007-06-01), Richardson et al.
patent: 7260764 (2007-08-01), Chen
patent: 7296216 (2007-11-01), Shen et al.
patent: 7340003 (2008-03-01), Nazari et al.
patent: 7395495 (2008-07-01), Jacobsen
patent: 7414551 (2008-08-01), Lee et al.
patent: 7418051 (2008-08-01), Kramer et al.
patent: 7434145 (2008-10-01), Jin et al.
patent: 7461328 (2008-12-01), Dabiri et al.
patent: 2004/0194007 (2004-09-01), Hocevar
patent: 2005/0007262 (2005-01-01), Craven et al.
patent: 2005/0229087 (2005-10-01), Kim et al.
patent: 2005/0262420 (2005-11-01), Park et al.
patent: 2006/0015791 (2006-01-01), Kikuchi et al.
patent: 2006/0020868 (2006-01-01), Richardson et al.
patent: 2006/0107176 (2006-05-01), Song
“A Reduced Complexity Decoder Architecture via Layered Decoding of LDPC Codes,” Dale E. Hocevar, DSP Solutions R&FD Center, Texas Instruments, Dallas, TX, SIPS 2004, pp. 107-112.
Jilei, H, Siegel, P and Milstein, L, Design of multi-input munti-output systems based on low-density parity-check codes. IEEE transactions on communications. Apr. 2005, vol. 53, No. 4, pp. 601-611, ISSN 0090-6778.
Kschischang, Frank R., et al., “Factor Graphs and the Sum-Product Algorithm”, IEEE Transactions on Information Theory, vol. 47, No. 2, pp. 496-519 (2001).
Arad Eran
Goldenberg Yoav
Gur Shimon
Kalit Gadi
Kons Shachar
DLA Piper (LLP) US
Rizk Sam
Trident Microsystems (Far East) Ltd.
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