MRAM including unit cell formed of one transistor and two...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S421000, C257S422000, C365S063000, C365S158000, C365S171000

Reexamination Certificate

active

06924520

ABSTRACT:
In an MRAM and method for fabricating the same, the MRAM includes a semiconductor substrate, a transistor formed on the semiconductor substrate, an interlayer dielectric formed on the semiconductor substrate to cover the transistor, and first and second MTJ cells formed in the interlayer dielectric to be coupled in parallel with a drain region of the transistor, wherein the first MTJ cell is coupled to a first bit line formed in the interlayer dielectric and the second MTJ cell is coupled to a second bit line formed in the interlayer dielectric, and wherein a data line is formed between the first MTJ cell and a gate electrode of the transistor to be perpendicular to the first bit line and the second bit line. The MRAM provides high integration density, sufficient sensing margin, high-speed operation and reduced noise, requires reduced current for recording data and eliminates a voltage offset.

REFERENCES:
patent: 2003/0117835 (2003-06-01), Kim et al.

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