MRAM device having low-k inter-metal dielectric

Details MRAM device having low-k inter-metal dielectric MRAM device having low-k inter-metal dielectric

2005-09-20

2005-09-20

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S298000, C257S303000, C257S306000, C257S324000, C438S003000, C438S240000

Reexamination Certificate

active

06946698

ABSTRACT:
A magnetic random access memory (MRAM) device including a magnetic tunneling junction (MTJ) stack separated from one or more proximate conductive layers and/or one or more proximate MTJ stacks by a low-k dielectric material.

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Saito, Yoshiaki, et al., “Correlation Between Barrier Width, Barrier Height, and DC Bias Voltage Dependencies on the Magnetoresistance Ratio in Ir-Mn Exchange Biased Single and Double Tunnel Junctions”, The Japan Society of Applied Physics, vol. 39, 2000, pp. L1035-L1038.
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