MRAM architecture

Static information storage and retrieval – Systems using particular element – Magnetoresistive

Reexamination Certificate

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C365S173000

Reexamination Certificate

active

06888743

ABSTRACT:
An MRAM architecture is provided that reduces the number of isolation transistors. The MRAM architecture includes magnetoresistive memory cells that are electrically coupled to form a ganged memory cell. The magnetoresistive memory cells of the ganged memory cell are formed with Magnetic Tunnel Junctions (MTJs) and formed without isolation devices, such as isolation transistors, and a programming line and a bit line are adjacent to each of the magnetoresistive memory cells. Preferably, the magnetoresistive memory cells of the ganged memory cell only include MTJs, and a programming line and a bit line are adjacent to each of the magnetoresistive memory cells.

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K.T.M. Ranmuthu, I.W. Ranmuthu, A.V. Pohm, C.S. Comstock M. Hassoun, “10-35 Nanosecond Magneto-Resistive Memories”, IEEE Transactions on Magnetics, vol. 26, No. 5, Sep. 1990, Engineering Research Institute, Iowa State University.
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