MOSFETS with a recessed self-aligned silicide contact and an ext

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438589, 438621, 438683, 438756, 438770, H01L 21822

Patent

active

060636807

ABSTRACT:
The method of the present invention includes forming a silicon dioxide layer, a first conductive layer and a first oxide layer on a silicon substrate to define a gate region of transistors. Then, a pad oxide layer is formed on the silicon substrate and a second oxide layer is formed on a side of the first conductive layer. Subsequently, a nitride spacer and a third oxide layer are formed, respectively. Then, the third oxide layer and the first oxide layer are removed. Next, a first metal layer is deposited on the silicon substrate and a source/drain/gate implantation is performed via ion implantation. Subsequently, a silicidation process is used to convert portions of the first metal layer into a silicide layer and then unreacted portions of the first metal layer and the nitride spacer are removed. Next, an ion implantation is performed to form an extended source/drain junction. Then, a fourth oxide layer is formed. Next, the fourth oxide layer is condensed and the silicide layer is annealed into a stable phase by rapid thermal process (RTP). Finally, metallization is performed.

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