MOSFETs comprising source/drain regions with slanted upper...

Details MOSFETs comprising source/drain regions with slanted upper... MOSFETs comprising source/drain regions with slanted upper...

2006-06-21

2009-02-03

Ghyka, Alexander G (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S300000, C438S303000, C438S218000, C257SE21640, C257SE21431

Reexamination Certificate

active

07485524

ABSTRACT:
The present invention relates to improved metal-oxide-semiconductor field effect transistor (MOSFET) devices comprising source and drain (S/D) regions having slanted upper surfaces with respect to a substrate surface. Such S/D regions may comprise semiconductor structures that are epitaxially grown in surface recesses in a semiconductor substrate. The surface recesses preferable each has a bottom surface that is parallel to the substrate surface, which is oriented along one of a first set of equivalent crystal planes, and one or more sidewall surfaces that are oriented along a second, different set of equivalent crystal planes. The slanted upper surfaces of the S/D regions function to improve the stress profile in the channel region as well as to reduce contact resistance of the MOSFET. Such S/D regions with slanted upper surfaces can be readily formed by crystallographic etching of the semiconductor substrate, followed by epitaxial growth of a semiconductor material.

REFERENCES:
patent: 5323053 (1994-06-01), Luryi et al.
patent: 5843322 (1998-12-01), Chandler, Jr.
patent: 6171966 (2001-01-01), Deacon et al.
patent: 6921914 (2005-07-01), Cheng et al.
patent: 6946350 (2005-09-01), Lindert et al.
patent: 6946371 (2005-09-01), Langdo et al.
patent: 7405131 (2008-07-01), Chong et al.
patent: 2004/0121507 (2004-06-01), Bude et al.
patent: 2004/0121564 (2004-06-01), Gogoi
patent: 2005/0009304 (2005-01-01), Zheleva et al.
patent: 2005/0116360 (2005-06-01), Huang et al.
patent: 2006/0038243 (2006-02-01), Ueno et al.
patent: 2007/0026591 (2007-02-01), Grupp et al.
patent: 2008/0001260 (2008-01-01), Zhu et al.

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