Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2011-06-14
2011-06-14
Bryant, Kiesha R (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S268000, C257S301000, C257S329000, C257S331000, C257SE27016, C257SE27060
Reexamination Certificate
active
07960233
ABSTRACT:
This invention discloses a new trenched vertical semiconductor power device that includes a capacitor formed between a conductive layer covering over an inter-dielectric layer disposed on top of a trenched gate. In a specific embodiment, the trenched vertical semiconductor power device may be a trenched metal oxide semiconductor field effect transistor (MOSFET) power device. The trenched gate is a trenched polysilicon gate and the conductive layer is a second polysilicon layer covering an inter-poly dielectric layer disposed on top of the trenched polysilicon gate. The conductive layer is further connected to a source of the vertical power device.
REFERENCES:
patent: 2002/0137291 (2002-09-01), Zandt In't et al.
Bhalla Anup
Lui Sik K.
Alpha and Omega Semiconductor Incorporated
Bryant Kiesha R
Lin Bo-In
Wright Tucker
LandOfFree
MOSFET with a second poly and an inter-poly dielectric layer... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOSFET with a second poly and an inter-poly dielectric layer..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOSFET with a second poly and an inter-poly dielectric layer... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2670045