Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1994-06-27
1999-04-13
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257 66, 257364, 257412, H01L 2976
Patent
active
058941576
ABSTRACT:
A method for fabricating a MOS transistor having an offset resistance in a channel region controlled by a gate voltage and structure thereof is disclosed. A gate electrode is divided into three adjacent regions of respectively a second conductivity type, first conductivity type and second conductivity type connected laterally to one another on a channel region. A gate control voltage is applied to a central region of the first conductivity type, and a predetermined voltage between maximum and minimum values of the gate control voltage is applied to left and right adjacent regions of the second conductivity type. If a gate turn-on voltage is applied to the central region the gate turn-on voltage is forward biased to the adjacent left and right regions and is therefore also applied to the forwardly biased left and right regions. The effective length of the gate electrode then becomes the total length of the central region and the left and right adjacent regions. If a gate turn-off voltage is applied to the central region the central region becomes reverse biased with the left and right adjacent regions and thus the effective length of the gate electrode becomes the length of only the central region of the first conductivity type. This reduces the length of the channel region, and thus forms an offset resistance structure which reduces leakage current in the off state of the MOS transistor.
REFERENCES:
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patent: 4811066 (1989-03-01), Pfiester et al.
patent: 5064775 (1991-11-01), Chang
patent: 5124769 (1992-06-01), Tanaka et al.
patent: 5381032 (1995-01-01), Kokawa et al.
patent: 5418392 (1995-05-01), Tanabe
Han Min-Koo
Min Byung-Hyuk
Crane Sara W.
Samsung Electronics Co,. Ltd.
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