MOS transistor apparatus and method of manufacturing same

Details MOS transistor apparatus and method of manufacturing same MOS transistor apparatus and method of manufacturing same

2005-06-14

2005-06-14

Tsai, H. Jey (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S299000, C438S301000

Reexamination Certificate

active

06905928

ABSTRACT:
When polycrystalline silicon germanium film is used for gate electrodes in a MOS transistor apparatus, there have been problems of reduced reliability in the gate insulating film, due to stress in the silicon germanium grains. Therefore, a polysilicon germanium film is formed, after forming silicon fine particles of particle size 10 nm or less on an oxide film. As a result, it is possible to achieve a high-speed MOS transistor apparatus using an ultra-thin oxide film having a film thickness of 1.5 nm or less, wherein the Ge concentration of the polycrystalline silicon germanium at its interface with the oxide film is uniform, thereby reducing the stress in the film, and improving the reliability of the gate electrode.

REFERENCES:
patent: 5907789 (1999-05-01), Komatsu
patent: 6191445 (2001-02-01), Fujiwara
patent: 6288943 (2001-09-01), Chi
patent: 6605520 (2003-08-01), Cheong
Wen-Chin Lee, et al., “Investigation of Poly-Si1-xGexfor Dual-Gate CMOS Technology,”IEEE Electron Device Letters(Jul. 1998), 19(7):247-49.
Kazuya Uejima, et al., “Highly Reliable Poly-SiGe/Amorphous-Si Gate CMOS,” Silcon Systems Research Labs., System Device and Fundamental Research, NEC Corporation (2000 IEEE), 4 pages.

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