MOS transistor and method of manufacturing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S283000, C438S301000

Reexamination Certificate

active

07449387

ABSTRACT:
A manufacturing method of a double LDD MOS transistor includes forming a gate electrode on a semiconductor substrate; forming a first LDD area by implanting and thermally annealing impurity ions using the gate electrode as a mask; forming a first spacer on both lateral walls of the gate electrode; forming a second LDD area by implanting and thermally annealing impurity ions using the gate electrode and the first spacer as a mask; forming a second spacer on both lateral walls of the gate electrode and the first spacer; and forming a source-drain diffusion area by implanting and thermally annealing impurity ions using the gate electrode, the first spacer, and the second spacer as a mask.

REFERENCES:
patent: 5953616 (1999-09-01), Ahn
patent: 6197648 (2001-03-01), Kasai et al.
patent: 6586306 (2003-07-01), Lee et al.
patent: 6939770 (2005-09-01), Khan et al.
patent: 2002/0155686 (2002-10-01), Lin et al.
patent: 2004/0121531 (2004-06-01), Wieczorek et al.
patent: 1020040050116 (2004-06-01), None

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