MOS structures that exhibit lower contact resistance and...

Details MOS structures that exhibit lower contact resistance and... MOS structures that exhibit lower contact resistance and...

2011-07-19

2011-07-19

Mulpuri, Savitri (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S300000, C438S304000, C257SE21409

Reexamination Certificate

active

07981749

ABSTRACT:
MOS structures that exhibit lower contact resistance and methods for fabricating such MOS structures are provided. In one method, a semiconductor substrate is provided and a gate stack is fabricated on the semiconductor substrate. An impurity-doped region within the semiconductor substrate aligned with the gate stack is formed. Adjacent contact fins extending from the impurity-doped region are fabricated and a metal silicide layer is formed on the contact fins. A contact to at least a portion of the metal silicide layer on at least one of the contact fins is fabricated.

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