MOS field effect transistor and its manufacturing method

Details MOS field effect transistor and its manufacturing method MOS field effect transistor and its manufacturing method

1997-01-14

1999-07-13

Booth, Richard A.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438478, H01L 21336, H01L 2120

Patent

active

059239859

ABSTRACT:
A method of manufacturing a MOS field effect transistor comprises forming on a semiconductor substrate a first epitaxial growth layer having an impurity doping concentration lower than that of the semiconductor substrate, forming on the first epitaxial growth layer a second epitaxial growth layer having an impurity concentration higher than that of the first epitaxial growth layer and having a thickness equal to or less than a diffusion depth of a source and a drain region, and forming on the second eptiaxial growth layer a third epitaxial growth layer having an impurity concentration lower than that of the second epitaxial growth layer and having a thickness equal to or less than that of a depletion layer at a channel region.

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patent: 4317690 (1982-03-01), Koomen et al.
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patent: 4525378 (1985-06-01), Schwabe et al.
patent: 4535530 (1985-08-01), Denda et al.
IBM Technical Disclosure Bulletin, vol. 20, No. 10, Mar. 1978, "FET Structures for Very High Performance Circuits Operating at Low Temperatures", E.F. Miersch et al.

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