MOS devices with source/drain regions having stressed...

Details MOS devices with source/drain regions having stressed... MOS devices with source/drain regions having stressed...

2006-11-20

2009-11-03

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

C257S018000, C257S063000, C257S065000, C257S190000, C257S192000, C257SE29104, C257SE29193, C257SE31035, C257SE33009

Reexamination Certificate

active

07612364

ABSTRACT:
A semiconductor structure includes a semiconductor substrate; a gate stack on the semiconductor substrate; a stressor having at least a portion in the semiconductor substrate and adjacent to the gate stack, wherein the stressor comprises an impurity of a first conductivity type; and a portion of the semiconductor substrate adjoining the stressor and on an opposite side of the stressor from the gate stack, wherein the portion of the semiconductor substrate is doped with an impurity of the first conductivity type.

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patent: 2007/0173022 (2007-07-01), Wang et al.
patent: 1725506 (2006-01-01), None

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