MOS devices with partial stressor channel

Details MOS devices with partial stressor channel MOS devices with partial stressor channel

2007-04-03

2009-06-30

Ho, Tu-Tu V (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Heterojunction

C257S255000, C257S638000, C257S190000, C257SE29193, C438S938000

Reexamination Certificate

active

07554110

ABSTRACT:
A semiconductor structure includes a semiconductor substrate having a first lattice constant; a gate dielectric on the semiconductor substrate; a gate electrode on the semiconductor substrate; and a stressor having at least a portion in the semiconductor substrate and adjacent the gate electrode. The stressor has a tilted sidewall on a side adjacent the gate electrode. The stressor includes a first stressor layer having a second lattice constant substantially different from the first lattice constant; and a second stressor layer on the first stressor layer, wherein the second stressor has a third lattice constant substantially different from the first and the second lattice constants.

REFERENCES:
patent: 6124614 (2000-09-01), Ryum et al.
patent: 6274894 (2001-08-01), Wieczorek et al.
patent: 6787793 (2004-09-01), Yoshida
patent: 6825086 (2004-11-01), Lee et al.
patent: 6858506 (2005-02-01), Chang
patent: 2006/0148151 (2006-07-01), Murthy et al.
patent: 2006/0292878 (2006-12-01), Hara
patent: 2007/0020864 (2007-01-01), Chong et al.

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