Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2010-01-18
2010-10-12
Dang, Trung (Department: 2892)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE27062
Reexamination Certificate
active
07812401
ABSTRACT:
An integrated circuit (IC) includes a semiconductor substrate, a least one MOS transistor formed in or on the substrate, the MOS transistor including a source and drain doped with a first dopant type having a channel region of a second dopant type interposed between, and a gate electrode and a gate insulator over the channel region. A silicide layer forming a low resistance contact is at an interface region at a surface portion of the source and drain. At the interface region a chemical concentration of the first dopant is at least 5×1020cm−3. Silicide interfaces according to the invention provide MOS transistor with a low silicide interface resistance, low pipe density, with an acceptably small impact on short channel behavior.
REFERENCES:
patent: 6518107 (2003-02-01), Buynoski et al.
patent: 2002/0146904 (2002-10-01), Buynoski et al.
patent: 2005/0208764 (2005-09-01), Lu et al.
patent: 2007/0298558 (2007-12-01), Yamauchi et al.
patent: 2007/0298575 (2007-12-01), Nouri et al.
Ekbote Shashank
Obradovic Borna
Visokay Mark
Brady III Wade J.
Dang Trung
Garner Jacqueline J.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
LandOfFree
MOS device and process having low resistance silicide... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOS device and process having low resistance silicide..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS device and process having low resistance silicide... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4199886