Static information storage and retrieval – Read/write circuit – Precharge
Patent
1983-02-18
1985-05-07
Miller, Stanley D.
Static information storage and retrieval
Read/write circuit
Precharge
307296R, 307304, 307574, H03K 17687, G11C 700
Patent
active
045162255
ABSTRACT:
A depletion load element for connection between a supply line V.sub.CC and a node 10 includes an enhancement mode field effect transistor 12 having a source 14 connected to the node 10, a gate 15 connected to the supply line, and a drain 25 connected to a second node; and a depletion mode field effect transistor 20 having a drain 21 connected to the supply line V.sub.CC and having a source 23 connected to the second node. The gate 22 is connected to one of the first or second nodes.
REFERENCES:
patent: 3950654 (1976-04-01), Broedner et al.
patent: 4048524 (1977-09-01), Laugesen et al.
patent: 4199693 (1980-04-01), Bennett
patent: 4239980 (1980-12-01), Takanashi et al.
patent: 4250408 (1981-02-01), Spence
patent: 4321489 (1982-03-01), Higuchi et al.
Advanced Micro Devices , Inc.
Hudspeth D. R.
King Patrick T.
Miller Stanley D.
Tortolano J. Vincent
LandOfFree
MOS Depletion load circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOS Depletion load circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS Depletion load circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1803714