Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1992-03-17
1994-05-17
Fears, Terrell W.
Static information storage and retrieval
Read/write circuit
Bad bit
365 96, 365201, 365210, G11C 1300
Patent
active
053134249
ABSTRACT:
A redundancy system formed on a semiconductor chip is provided which includes circuits for testing a memory array to locate a faulty element therein, a register for storing an address of the faulty element and electrical fuses blown in response to binary digits of the address stored in the register upon application of an enable signal from a single input to the semiconductor chip. The enable signal passes through logic circuits on the chip such that the fuses cannot be programmed or blown unless the enable signal is present. An address decoder coupled to outputs from the fuses substitutes a redundant element for the faulty element.
REFERENCES:
patent: 3560764 (1971-02-01), McDowell
patent: 3585607 (1971-06-01), De Haan et al.
patent: 3755791 (1973-08-01), Arzubi
patent: 4939694 (1990-07-01), Eaton et al.
European Patent Application 0 242 854, published Oct. 28, 1987. IBM Technical Disclosure Bulletin, vol. 23, No. 8, pp. 3601 and 3602, entitled "Semiconductor Memory Redundancy at Module Level" by B. F. Fitzgerald et al.
U.S. patent application Ser. No. 07/576,646, filed Aug. 30, 1990, by E. L. Hedberg et al, entitled "Built-In Self Test for Integrated Circuits".
U.S. patent application Ser. No. 07/777,877, filed Oct. 16, 1991, by E. L. Hedberg et al, entitled "Method & Apparatus for Real Time Two Dimensional Red.Allocation".
U.S. patent application Ser. No. 07/693,463, field Apr. 30, 1991, by W. Abadeer et al, entitled "Low Voltage Programmable Storage Element".
"A Physical Mechanism of Current-Induced Resistance Decrease In Heavily Doped Polysilicon Resistors", IEEE Transactions on Electron Devices, vol. ED-29, No. 8, Aug. 1982, pp. 1156 to 1161, by K. Kato et al.
Adams Robert D.
Bonges, III Henry A.
Dawson James W.
Hedberg Erik L.
Chadurjian Mark F.
Fears Terrell W.
International Business Machines - Corporation
Limanek Stephen J.
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