Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-08-29
1998-12-01
Bowers, Charles
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438760, 438784, 438905, 134 11, H01L 21316
Patent
active
058438386
ABSTRACT:
A method of forming a BPSG dielectric layer on a wafer without delamination in the fabrication of an integrated circuit device wherein a BPSG deposition chamber is used is described. Semiconductor device structures are provided in and on a semiconductor substrate. The BPSG deposition chamber is cleaned according to the following steps. The deposition chamber is cleaned using a fluorine-containing gas. The fluorine-containing gas is pumped out of the deposition chamber wherein residual fluorine-containing gas remains within the deposition chamber. A plasma is flowed into the deposition chamber wherein the plasma consumes all of the residual fluorine-containing gas. The plasma is purged from the deposition chamber to complete the cleaning of the BPSG deposition chamber. Thereafter, a layer of BPSG is deposited over the semiconductor device structures wherein the BPSG layer is deposited while the wafer is within the BPSG deposition chamber. The BPSG layer is flowed wherein no fluorine gas bubble is formed within the BPSG layer to complete the formation of the BPSG dielectric layer on the wafer without delamination in the fabrication of an integrated circuit device.
REFERENCES:
patent: 5041311 (1991-08-01), Tsukune et al.
patent: 5071788 (1991-12-01), Joshi
patent: 5129958 (1992-07-01), Nagashima et al.
patent: 5207836 (1993-05-01), Chang
patent: 5260236 (1993-11-01), Petro et al.
patent: 5270256 (1993-12-01), Bost et al.
patent: 5326723 (1994-07-01), Petro et al.
patent: 5434096 (1995-07-01), Chu et al.
patent: 5632821 (1997-05-01), Doi
patent: 5647953 (1997-07-01), Williams et al.
Wolf, Stanley, Silicon Processing For The VLSI Era, vol. 2, pp. 104-105 and 194-195 (1990).
Chen Han-Chung
Saile George O.
Ackerman Stephen B.
Bowers Charles
Pike Rosemary L. S.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
LandOfFree
Modified clean recipe to suppress formation of BPSG bubble does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Modified clean recipe to suppress formation of BPSG bubble, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Modified clean recipe to suppress formation of BPSG bubble will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2395436