Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Testing or evaluating
Reexamination Certificate
2011-05-17
2011-05-17
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Testing or evaluating
C716S106000, C703S020000, C703S028000
Reexamination Certificate
active
07945888
ABSTRACT:
Device, system and method for verification of a hardware system-under-test including at least one processor. A method includes building an executable image of a hardware exerciser adapted for execution on a test platform selected from: a simulation accelerator, a hardware emulator, a prototype hardware system, and a hardware production wafer. The exerciser image includes embedded data corresponding to architectural knowledge, testing knowledge, and a test template. The test template is defined in a context-free formal language and includes biasing directives to influence at least one of a desired test structure, one or more resources to be included in the test, and one or more values of the included resources. The architectural knowledge is obtained from an architectural model including a formal description of the specification for the system-under-test, and the testing knowledge is obtained from a testing knowledgebase including heuristics for testing desired aspects of the system-under-test.
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Adir Allon
Shurek Gil Eliezer
International Business Machines - Corporation
Whitmore Stacy A
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