Mitigating side effects of impedance transformation circuits

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

Reexamination Certificate

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Details

C326S030000, C326S081000, C327S333000, C327S541000, C327S543000, C330S296000

Reexamination Certificate

active

08067958

ABSTRACT:
Implementations to mitigating side effects of impedance transformation circuits are described. In particular, mitigation circuitry may be coupled to a high impedance circuit to minimize or eliminate non-linear output of the high impedance circuit in order to provide a well-defined bias voltage to the input of a buffer or amplifier device coupled to a capacitive sensor. Additionally, the mitigation circuitry may be coupled to the high impedance circuit to reduce or eliminate rectifying effects of the high impedance circuit. Accordingly, a bias voltage can be utilized to provide a stable operating point of the buffer or amplifier device via a high impedance circuit utilizing one or more impedance transformations.

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patent: 7619476 (2009-11-01), Harman
patent: 2008/0136381 (2008-06-01), Yang et al.
patent: 2010/0308906 (2010-12-01), Draxelmayr

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