Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-11-27
2007-11-27
Chaudhari, Chandra (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S634000, C257SE21021
Reexamination Certificate
active
10907448
ABSTRACT:
A method for fabricating an MIM capacitor is disclosed. First, a substrate is provided having a first dielectric layer thereon. Next at least one first damascene conductor is formed within the first dielectric layer, and a second dielectric layer with a capacitor opening is formed on the first dielectric layer, in which the capacitor opening is situated directly above the first damascene conductor. Next, an MIM capacitor having a top plate and a bottom plate is created within the capacitor opening, in which the bottom plate of the MIM capacitor is electrically connected to the first damascene conductor. Next, a third dielectric layer is deposited on the second dielectric layer and the MIM capacitor, and at least one second damascene conductor is formed within part of the third dielectric layer, in which the second damascene conductor is electrically connected to the top plate of the MIM capacitor.
REFERENCES:
patent: 6232197 (2001-05-01), Tsai
patent: 6596581 (2003-07-01), Park et al.
patent: 6746914 (2004-06-01), Kai et al.
Hung Chien-Chou
Lin Chun-Yi
Chaudhari Chandra
Hsu Winston
United Microelectronics Corp.
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