Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Physical deformation
Reexamination Certificate
2001-07-19
2002-11-19
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Physical deformation
C257S417000, C257S419000, C257S420000, C257S619000
Reexamination Certificate
active
06483160
ABSTRACT:
The present invention relates to a micromechanical enclosure, for enclosing a micromechanical sensor, for example.
BACKGROUND OF THE INVENTION
Previous micromechanical enclosures consist of a substrate which contains a micromechanical structure, and which has conductor tracks that are linked, for example, to an external evaluation circuit for evaluating signals. The sensitive part of such an arrangement has to be protected from environmental influences, particularly moisture and dust, by a cover. This cover must be joined to the substrate element in such a manner that a sealed joint results, above all at those positions where the conductor tracks are run from the covered area to the uncovered area. The sealing of the sensitive part of the substrate by a cover is generally achieved by means of micromechanical enclosures in which two wafers are bonded to each other, and in which one wafer has a plurality of identical components with the micromechanical structure, and the other wafer forms the covers, so that a composite wafer is formed through bonding. Separating such a composite wafer produces single components which are already located in hermetically sealed enclosures. Glass frits, which are arranged in a ring-shape on the cover or around the part of the substrate that is to be covered, and which are melted during the joining of the two wafers, are frequently used as a bonding material between the two wafers. This glass frit bond has a thickness of around 50 &mgr;m to 100 &mgr;m and a width of around 500 &mgr;m. The thickness of its structure has a level compensating effect as the height of the substrate structure varies along the joint. Furthermore, it effects electrical insulation between cover and substrate.
The disadvantage of such an assembly is that a great deal of space is required for the cover connection, and this often exceeds the space required by the useful element. Moreover, glass frit bonding is complicated, and the components are afflicted with a high stress factor as a result of the differing coefficients of expansion and the relatively thick layers. It is practically impossible to set a precise spacing to the cover wafer for inserting counter electrodes.
A capacitive sensor is disclosed in EP 0 773 443 B1, in which two semiconductor wafers are joined by means of a metallic wafer bond. This wafer bond is a thin metallic soldered joint with a low space requirement. Such metallic layers can be applied to the wafers by known and conventional manufacturing processes. The disadvantage with this is that no means is provided of dielectrically insulating the lead-through of the conductor tracks.
In the publication “A design-based approach to planarization in multilayer surface micromachining” by Raji Krishnamoorthy Mali, Thomas Bifano, David Koester in the Journal Micromech. Microeng. 9 (1999); p. 294 to p. 299, a planarizing method is disclosed, which enables the distance between two layers lying next to each other to be reduced.
SUMMARY OF THE INVENTION
The object of the invention is to provide a micromechanical enclosure which has small dimensions and which can be simply and reliably manufactured without requiring additional and complex processing steps.
This object of the invention is achieved in a micromechanical enclosure by the special features of the invention. According to the invention, at least in the area of the contact surface, which is formed between the cover and the main surface, a level compensation layer, which evens up the level beneath the contact surface to the desired height, is arranged in the same layer next to the conductor track layer.
The advantages achieved by the invention are the highly space-saving cover achieved by bonding two wafers, which together form a completely enclosed micromechanical sensor, for example on a silicon basis. The enclosure of the sensor is hermetically sealed. This type of wafer assembly enables a simple and reliable joining process which has a high yield of hermetically sealed, enclosed micromechanical sensors.
Advantageous further developments of the invention provide additional features. Here, the level compensation layer and the conductor track layer have at least the same structural height. Furthermore, it is advantageous if the level compensation layer and the conductor track layer are constructed from the same material in one working cycle. Furthermore, by providing an insulating planarizing layer, which fills the small gaps between the conductor track layer and the level compensation layer, above the level compensation layer and the conductor track layer, then a plane surface is created in the entire contact area between the main surface and the cover which, in turn, enables the cover to be easily mounted, and which hermetically seals the conductor track passage through the substrate. The dielectrically insulated conductor track passage also makes such an assembly suitable for capacitive sensors. Furthermore, if the lateral distance between the level compensation layer and the conductor track layer is less than double the thickness of the planarizing layer, then adequate planarizing can be achieved by merely cutting the layer off without any further process steps.
REFERENCES:
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patent: 5532187 (1996-07-01), Schreiber-Prillwitz et al.
patent: 5668033 (1997-09-01), Ohara et al.
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Raji Krishnamoorthy Mali et al.; “A design-based approach to planarization in multilayer surfae micromachining”; Journal Micromech. Microeng. 9; 1999, pp. 294 to 299.
Engelhardt Albert
Hartmann Bernhard
Prechtel Ulrich
Seidel Helmut
Daimler-Chrysler AG
Fasse W. F.
Fasse W. G.
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