Methods providing oxide layers having reduced thicknesses at...

Details Methods providing oxide layers having reduced thicknesses at... Methods providing oxide layers having reduced thicknesses at...

2005-11-29

2005-11-29

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S283000, C438S195000

Reexamination Certificate

active

06969658

ABSTRACT:
Methods of forming an integrated circuit device may include forming first and second spaced apart source/drain regions on a surface of a semiconductor substrate. A gate insulating layer can be formed on the semiconductor substrate extending between the first and second spaced apart souce/drain regions. The gate insulating layer can have a reduced thickness at a central portion thereof between the first and second spaced apart source/drain regions. A thickness of the gate insulating layer can increase as it extends toward each of the source/drain regions. A gate electrode can be formed on the gate insulating layer such that the gate insulating layer is between the semiconductor substrate and the gate electrode. Related devices are also discussed.

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Translation of Notice to Submit Response from Korean Patent Office for Korean Application No. 10-2001-0016870 dated May 29, 2003.

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