Methods of reducing coupling between floating gates in...

Details Methods of reducing coupling between floating gates in... Methods of reducing coupling between floating gates in...

2006-09-21

2009-11-10

Nguyen, Ha Tran T (Department: 2829)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S264000, C438S279000, C257SE29112, C257SE29129

Reexamination Certificate

active

07615445

ABSTRACT:
A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures. An array having inverted-T shaped floating gates may be formed in a self-aligned manner.

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