Methods of operating phase-change random access memory devices

Details Methods of operating phase-change random access memory devices Methods of operating phase-change random access memory devices

2009-01-08

2010-12-07

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Testing

C365S148000, C365S200000, C365S185090

Reexamination Certificate

active

07848165

ABSTRACT:
A phase-change random access memory (PRAM) device includes a plurality of banks, a plurality of column redundancy cell arrays, and a plurality of column redundancy write drivers. Each of the plurality of column redundancy cell arrays corresponds to at least one of the banks. Each of the plurality of column redundancy write drivers corresponds to at least one of the column redundancy cell arrays. The column redundancy write drivers are configured to transmit respective redundancy test data to the corresponding ones of the column redundancy cell arrays in response to a test control signal, which may be activated in response to each program pulse for writing data. Related test and access methods are also discussed.

REFERENCES:
patent: 2006/0274574 (2006-12-01), Choi et al.
patent: 2008/0007986 (2008-01-01), Jeong et al.
patent: 2006-244561 (2006-09-01), None
patent: 100300036 (2001-06-01), None
patent: 1020070073304 (2007-07-01), None

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