Static information storage and retrieval – Systems using particular element – Resistive
Reexamination Certificate
2007-07-12
2009-12-22
Luu, Pho M. (Department: 2824)
Static information storage and retrieval
Systems using particular element
Resistive
C365S046000, C365S100000, C365S180000
Reexamination Certificate
active
07636251
ABSTRACT:
A nonvolatile memory device may be operated in a multi-bit mode at a lower operating current and with higher integrated of the memory device. A first buried electrode may be used as a first bit line, a second buried electrode may be used as a second bit line, and/or a gate electrode may be used as a word line. First and second resistance layers may be programmed with 2-bit data and the 2-bit data may be read from the first and second resistance layers. More than 2-bit data may be programmed and read using more than 2 buried electrodes.
REFERENCES:
patent: 6570788 (2003-05-01), Nakamura
patent: 7259387 (2007-08-01), Kawazoe et al.
patent: 2006/0006457 (2006-01-01), Ono
Byun Sung-jae
Cho Kyoung-lee
Hyun Jae-woong
Park Yoon-dong
Harness & Dickey & Pierce P.L.C.
Luu Pho M.
Samsung Electronics Co,. Ltd.
LandOfFree
Methods of operating a non-volatile memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods of operating a non-volatile memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of operating a non-volatile memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4057908