Methods of making compliant interfaces and microelectronic...

Details Methods of making compliant interfaces and microelectronic... Methods of making compliant interfaces and microelectronic...

1999-04-16

2001-10-09

Bowers, Charles (Department: 2813)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S117000

Reexamination Certificate

active

06300254

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of microelectronic packaging and methods of making the same and more particularly relates to methods of making connection components and compliant interfaces for microelectronic packages.
BACKGROUND OF THE INVENTION
Semiconductor chip manufactures and packagers sometimes use ball grid arrays (“BGAs”) to interconnect semiconductor chips to external circuits such as printed circuit boards. Using BGA technology, a semiconductor chip is connected to a printed circuit board using solder connections. When solder alone is used to interconnect the contacts on the semiconductor chip to the printed circuit board, the solder columns are typically short in order to maintain the structural integrity of the solder column. As a result, the solder columns have minimal elastic properties and are susceptible to solder cracking due to mechanical stress that result from differences in the coefficients of thermal expansion (“CTE”) of the chip and the printed circuit board. When the chip heats up during use, both the chip and printed circuit board expand but at different rates and by different amounts. The chip and the board tend to cool down when the chip is not in operation. As the chip and the board cool, both tend to contract but at different rates and by different amounts. This time-wise and amount-wise variation in expansion and contraction stresses the interconnections between the chip and the printed circuit board.
Several inventions commonly assigned to the assignee of the present invention deal effectively, but differently, with this thermal cycling problem. Such inventions include U.S. Pat. Nos. 5,148,265; 5,148,266; 5,477,611; 5,548,091; 5,663,106; and 5,659,952; and U.S. patent applications with Ser. No. 08/987,720 (filed on Jun. 20, 1997); Ser. No. 08/842,313 (filed on Apr. 24, 1997); and Ser. No. 08/931,680 (filed on Sep. 16, 1997). The specifications of all of the above listed patent and patent applications are incorporated by reference herein. Despite the positive results of the aforementioned commonly owned inventions, still further improvements would be desirable.
SUMMARY OF THE INVENTION
The present invention relates to methods of making a compliant interface for use in microelectronic packages. The method of this aspect of the present invention includes providing a support structure and forming a plurality of compliant pads on the support structure using a stamping or molding process. In one preferred embodiment, the support structure includes a circuitized dielectric layer. In another preferred embodiment, the support structure is a release layer.
The present invention also relates to methods of making a microelectronic package using the compliant interface of the present invention. In one aspect of the present method, a compliant interface comprising a circuitized dielectric layer and a plurality of compliant pads is provided. A microelectronic element, such as a semiconductor chip or a wafer, is connected to circuitized dielectric layer by forming leads connecting terminals on the circuitized dielectric layer with contacts on the microelectronic element. In preferred embodiments, an encapsulant composition is then disposed between the dielectric layer and the microelectronic element and around the compliant pads. The encapsulant composition may then be cured to form a cured encapsulant. The cured encapsulant and the compliant pads form a compliant layer disposed between the microelectronic element and the circuitized dielectric layer.
In another aspect of the present method, a compliant interface comprising a release layer and a plurality of compliant pads is provided. The compliant pads are transferred from the release layer to a surface of a circuitized dielectric substrate. In preferred embodiments, the circuitized dielectric substrate is a flexible but substantially inextensible dielectric film. A microelectronic element is connected to the circuitized dielectric substrate by forming leads between terminals on the dielectric substrate and contacts on the microelectronic element. In preferred embodiments, an encapsulant composition is then disposed between the dielectric substrate and the microelectronic element and around the leads. The encapsulant composition is then cured to form, together with the compliant pads, a compliant layer between the microelectronic element and the circuitized dielectric layer.


REFERENCES:
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patent: 5148266 (1992-09-01), Khandros et al.
patent: 5477611 (1995-12-01), Sweis et al.
patent: 5547530 (1996-08-01), Nakamura
patent: 5548091 (1996-08-01), DiStefano et al.
patent: 5659952 (1997-08-01), Kovac et al.
patent: 5663106 (1997-09-01), Karavakis et al.
patent: 5915170 (1999-06-01), Raab et al.

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