Methods of making and using a floating interposer

Details Methods of making and using a floating interposer Methods of making and using a floating interposer

2005-09-20

2005-09-20

Pert, Evan (Department: 2826)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Incorporating resilient component

C029S829000, C029S832000

Reexamination Certificate

active

06946329

ABSTRACT:
A flexible, compliant layer of a single low modulus material for connecting a chip die directly to a circuit card without encapsulation. The flexible compliant layer provides stress relief caused by CTE thermal mismatch in chip die and circuit card. An array of copper plated vias are formed in said compliant layer with each via terminating on opposing surfaces of the layer in copper pads. Rather than copper, other metals, such as gold or nickel, may also be used. An array of holes may be positioned between said array of vias to provide additional resiliency. The plated vias may be angled with respect to said opposing surfaces to allow additional vertical and horizontal stress relief. Connection of the pads on one surface to high melt C-4 solder balls or columns on a chip die results in solder filled vias. Low melt solder connection of the pads on the other surface to a circuit card allows non-destructive rework of the cards.

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IBM Technical Disclosure Bulletin, R.L. Imken, et al., entitled “Interposer for Direct Chip Attach or Surface Mount Array Devices” vol. 36, No. 7, Jul. 1993, pp. 137.

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