Methods of forming semiconductor-on-insulator substrates

Details Methods of forming semiconductor-on-insulator substrates Methods of forming semiconductor-on-insulator substrates

1997-04-09

1999-03-02

Wilczewski, Mary

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438164, 438977, 438459, 438455, 257349, 257347, H01L 21336

Patent

active

058770461

ABSTRACT:
Methods of forming semiconductor-on-insulator substrates include the steps of forming a underlying semiconductor layer to electrically interconnect a plurality of SOI active regions and thereby prevent one or more of the active regions from "floating" relative to the other active regions. The reduction of floating body effects (FBE) improves the I-V characteristics of SOI devices including SOI MOSFETs. A method is provided which includes the steps of forming a second electrically insulating layer having a plurality of first openings therein, on a first face of a first semiconductor substrate. A first semiconductor layer is then formed on the second electrically insulating layer so that direct electrical connections are made between the first semiconductor layer and the first semiconductor substrate. A first electrically insulating layer is then formed on the first semiconductor layer. This first electrically insulating layer is then planarized and bonded to a second semiconductor substrate. The composite intermediate structure is then inverted and followed by the step of planarizing a second face of the first semiconductor substrate to define a second semiconductor layer. A plurality of spaced semiconductor active regions are then defined in the second semiconductor layer by using field oxide isolation techniques to consume the entire thickness of the second semiconductor layer at predetermined spaced locations. This step essentially isolates the active regions from each other, however, these active regions do not "float" because they are electrically connected to each other indirectly through the underlying first semiconductor layer.

REFERENCES:
patent: 4396933 (1983-08-01), Magdo et al.
patent: 4814287 (1989-03-01), Takemoto et al.
patent: 5055898 (1991-10-01), Beilstein, Jr. et al.
patent: 5145802 (1992-09-01), Tyson et al.
patent: 5296086 (1994-03-01), Takasu
patent: 5308779 (1994-05-01), Sarma
patent: 5317181 (1994-05-01), Tyson
patent: 5326991 (1994-07-01), Takasu
patent: 5405795 (1995-04-01), Beyer et al.
patent: 5437762 (1995-08-01), Ochiai et al.
patent: 5474952 (1995-12-01), Fujii
patent: 5489792 (1996-02-01), Hu et al.
patent: 5518953 (1996-05-01), Takasu
patent: 5536950 (1996-07-01), Liu et al.
patent: 5578865 (1996-11-01), Vu et al.
patent: 5587604 (1996-12-01), Machesney et al.
patent: 5591650 (1997-01-01), Hsu et al.
patent: 5597739 (1997-01-01), Sumi et al.
patent: 5612230 (1997-03-01), Yuzurihara et al.
patent: 5633182 (1997-05-01), Miyawaki et al.
S.M. Sze, The Silicon-On-Insulator MOSFET, High-Speed Semiconductor Devices, Chapter 3, A Wiley-Interscience Publication, 1990, pp. 190-197 No Month.

Affiliated with

Also associated with

Rating

Methods of forming semiconductor-on-insulator substrates does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods of forming semiconductor-on-insulator substrates, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of forming semiconductor-on-insulator substrates will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-422302