Methods of forming semiconductor-on-insulator field effect trans

Details Methods of forming semiconductor-on-insulator field effect trans Methods of forming semiconductor-on-insulator field effect trans

1999-10-29

2000-12-12

Chaudhuri, Olik

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438149, 438157, 438479, 438517, 438311, 438910, H01L 2100

Patent

active

061597783

ABSTRACT:
SOI FETs include an electrically insulating substrate, a semiconductor region on the electrically insulating substrate, a field effect transistor having source, drain and channel regions in the semiconductor region and a metal silicide region between the electrically insulating substrate and the semiconductor region. The metal silicide region (e.g., TiSi.sub.2) forms non-rectifying junctions with the source and channel regions of the field effect transistor so that holes accumulated in the channel region (upon impact ionization) can be readily transported to the source region (and contact thereto) via the metal silicide layer and recombination of the holes with electrons in the source region can be carried out with high efficiency. The metal silicide region ohmically contacts the source and channel regions, but does not form a junction with the drain region of said field effect transistor.

REFERENCES:
patent: 4396933 (1983-08-01), Magdo et al.
patent: 4814287 (1989-03-01), Takemoto et al.
patent: 4974041 (1990-11-01), Grinberg
patent: 5055898 (1991-10-01), Beilstein, Jr. et al.
patent: 5145802 (1992-09-01), Tyson et al.
patent: 5185280 (1993-02-01), Houston et al.
patent: 5215931 (1993-06-01), Houston
patent: 5278102 (1994-01-01), Horie
patent: 5296086 (1994-03-01), Takasu
patent: 5308779 (1994-05-01), Sarma
patent: 5317181 (1994-05-01), Tyson
patent: 5326991 (1994-07-01), Takasu
patent: 5405795 (1995-04-01), Beyer et al.
patent: 5437762 (1995-08-01), Ochiai et al.
patent: 5440161 (1995-08-01), Iwamatsu et al.
patent: 5449642 (1995-09-01), Tan et al.
patent: 5459346 (1995-10-01), Asakawa et al.
patent: 5474952 (1995-12-01), Fujii
patent: 5489792 (1996-02-01), Hu et al.
patent: 5518953 (1996-05-01), Takasu
patent: 5573961 (1996-11-01), Hsu et al.
patent: 5578509 (1996-11-01), Fujita
patent: 5578865 (1996-11-01), Vu et al.
patent: 5591650 (1997-01-01), Hsu et al.
patent: 5597739 (1997-01-01), Sumi et al.
patent: 5612230 (1997-03-01), Yuzurihara et al.
patent: 5633182 (1997-05-01), Miyawaki et al.
patent: 5637514 (1997-06-01), Jeng et al.
patent: 5650340 (1997-07-01), Burr et al.
patent: 5670389 (1997-09-01), Huang et al.
patent: 5681761 (1997-10-01), Kim
patent: 5741736 (1998-04-01), Orlowski et al.
patent: 5744372 (1998-04-01), Bulucea
patent: 5926699 (1999-07-01), Hayashi et al.
patent: 6010921 (2000-01-01), Soutome
patent: 6048756 (2000-04-01), Lee et al.
Song et al., "Optimization Study of Halo Doped MOSFETs", Solid-State Electronics, vol. 39, No. 6, 1996, pp. 923-927.
Sanchez et al., "Drain-Engineered Hot-Electron-Resistant Device Structures: A Review", IEEE Transactions on Electron Devices, vol. 36, No. 6, Jun. 1989, pp. 1125-1132.

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