Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-09-22
1999-11-23
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438217, 438275, 438753, H01L 218238
Patent
active
059899484
ABSTRACT:
The invention encompasses methods of forming pairs of transistor gates. In one aspect, the invention includes a method comprising: a) defining a first region and a second region of a substrate; the first region and second region comprising a first substrate surface and a second substrate surface, respectively; b) improving a lifetime of a low voltage tolerant transistor formed proximate the first substrate surface by cleaning the first substrate surface with a first mixture comprising hydrofluoric acid and hydrochloric acid; c) forming a first transistor gate over the first substrate region and incorporating the first transistor gate into the low-voltage tolerant transistor; and d) forming a second transistor gate over the second substrate region and incorporating the second transistor rate into a high-voltage tolerant transistor. In another aspect, the invention includes a method comprising: a) defining a first region and a second region of a substrate; the first region and second region comprising a first substrate surface and a second substrate surface, respectively; b) cleaning at least one of the first and second substrate surfaces with a first mixture comprising hydrofluoric acid and hydrochloric acid; c) after cleaning the at least one of the first and second substrate surfaces, forming a first oxide layer over the first and second substrate surfaces; d) removing the first oxide layer from over the first substrate surface while leaving the first oxide layer over the second substrate surface; and e) forming a second oxide layer over the first substrate surface.
REFERENCES:
patent: 5047816 (1991-09-01), Cuevas
patent: 5498578 (1996-03-01), Steele et al.
patent: 5821172 (1998-10-01), Gilmer et al.
Brugge Hunter
Vines Landon
Chang Joni
VLSI Technology Inc.
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