Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-05-08
2007-05-08
Tran, Long K. (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S259000, C438S258000, C257S314000, C257S315000, C257S316000
Reexamination Certificate
active
11247814
ABSTRACT:
In a floating gate memory cell including a floating gate separated from an active region by a tunnel isolation region, a first one of the active region and the floating gate comprises a portion that protrudes towards a second one of the active region and the floating gate. In some embodiments, the protruding portion tapers toward the second one of the active region and the floating gate. The tunnel insulation layer may be narrowed at the protruding portion. Protruding portions may be formed on both the floating gate and the active region.
REFERENCES:
patent: 5350937 (1994-09-01), Yamazaki et al.
patent: 6706592 (2004-03-01), Chern et al.
patent: 6844232 (2005-01-01), Choi et al.
patent: 2004/0084713 (2004-05-01), Hsieh
Choi Jeong-Hyuk
Lee Jae-Duk
Park Dong-gun
Myers Bigel & Sibley & Sajovec
Tran Long K.
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