Methods of forming integrated semiconductor devices having impro

Details Methods of forming integrated semiconductor devices having impro Methods of forming integrated semiconductor devices having impro

1996-05-09

1998-07-28

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

438449, 438451, 438298, 438527, H04L 2176

Patent

active

057862656

ABSTRACT:
Methods of forming semiconductor devices containing field oxide and channel-stop isolation regions therein include the steps of forming a plurality of first channel-stop isolation regions by implanting first conductivity type impurities at a first dose level into a face of a semiconductor substrate and then forming respective field oxide isolation regions at the locations where the first channel-stop isolation regions have been implanted. A conductive layer, which contacts active regions of the substrate and covers the field oxide isolation regions, is then patterned over the field oxide isolation regions to expose central portions of the upper surfaces of the field oxide isolation regions. The patterned conductive layer constitutes a landing pad layer which is preferably used as a mask during the formation of second channel-stop isolation regions in the substrate, by implanting first conductivity type impurities through the exposed upper surfaces of the field oxide isolation regions, into the centers of the first channel-stop isolation regions. During this step, the impurities are implanted at a higher dose and energy level so that the first and second channel-stop regions collectively form T-shaped channel-stop regions underneath respective field oxide isolation regions, when viewed in transverse cross-section. By reducing the concentration of the channel-stop impurities near the edges of the field oxide isolation regions and active regions, leakage currents can be reduced and refresh characteristics of memory devices can be improved by reducing the strength of parasitic electric fields in the substrate. However, by maintaining relatively high concentrations of the channel-stop impurities under the center of the field oxide isolation regions, electrical isolation of adjacent devices can be maintained at high levels.

REFERENCES:
patent: 4794565 (1988-12-01), Wu et al.
patent: 5041886 (1991-08-01), Lee
patent: 5235544 (1993-08-01), Caywood
patent: 5439835 (1995-08-01), Gonzalez
patent: 5514889 (1996-05-01), Cho et al.
patent: 5556798 (1996-09-01), Hong

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