Methods of forming integrated circuit memory devices that...

Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – Amorphous semiconductor

Reexamination Certificate

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Details

C438S253000, C438S254000, C438S396000, C438S397000, C257S306000, C257S303000, C257S734000, C257S908000

Reexamination Certificate

active

06890841

ABSTRACT:
An integrated circuit memory device is formed by forming an interlevel insulating layer on a substrate. A plurality of storage node contact holes are formed in the interlayer insulating layer and are arranged in a pattern. A plurality of contact plugs are formed in the plurality of storage node contact holes, respectively. A material layer is formed on the interlevel insulating layer that has a plurality of landing pad holes that expose the plurality of contact plugs, respectively, the plurality of landing pad holes are arranged in a pattern that is offset with respect to the pattern of the storage node contact holes. A plurality of landing pads are formed in the plurality of landing pad holes and are connected to the plurality of contact plugs, respectively. A plurality of storage nodes are formed that are connected to the plurality of landing pads, respectively.

REFERENCES:
patent: 5622883 (1997-04-01), Kim
patent: 6153516 (2000-11-01), Chien
patent: 6249018 (2001-06-01), Liaw et al.
patent: 6329241 (2001-12-01), Lin
patent: 6406971 (2002-06-01), Chien et al.
patent: 6521933 (2003-02-01), Miyajima et al.
patent: 14-083881 (2002-03-01), None
patent: 2002-34468 (2002-05-01), None

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