Methods of forming integrated circuit devices having...

Details Methods of forming integrated circuit devices having... Methods of forming integrated circuit devices having...

2007-10-12

2010-11-23

Ghyka, Alexander G (Department: 2812)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S421000, C438S423000, C438S424000, C257SE21546

Reexamination Certificate

active

07838390

ABSTRACT:
Methods of forming integrated circuit devices include forming a trench in a surface of semiconductor substrate and filling the trench with an electrically insulating region having a seam therein. The trench may be filled by depositing a sufficiently thick electrically insulating layer on sidewalls and a bottom of the trench. Curing ions are then implanted into the electrically insulating region at a sufficient energy and dose to reduce a degree of atomic order therein. The curing ions may be ones selected from a group consisting of nitrogen (N), phosphorus (P), boron (B), arsenic (As), carbon (C), argon (Ar), germanium (Ge), helium (He), neon (Ne) and xenon (Xe). These curing ions may be implanted at an energy of at least about 80 KeV and a dose of at least about 5×1014ions/cm2. The electrically insulating region is then annealed at a sufficient temperature and for a sufficient duration to increase a degree of atomic order within the electrically insulating region.

REFERENCES:
patent: 2007/0210366 (2007-09-01), Sandhu et al.
patent: 06-302682 (1994-10-01), None
patent: 1020050002382 (2005-01-01), None
patent: 1020060104829 (2006-10-01), None

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