Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Combined with the removal of material by nonchemical means
Patent
1997-07-09
2000-03-28
Booth, Richard
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Combined with the removal of material by nonchemical means
438963, 438940, 438631, 438626, H01L 2131, H01L 21469
Patent
active
060431652
ABSTRACT:
Methods of forming electrically interconnected lines using organic compound cleaning agents include the steps of forming a first electrically conductive line on a substrate and then forming a first electrically insulating layer on the first electrically conductive line to electrically isolate the first conductive line from adjacent regions and lines. An organic spin-on-glass (SOG) passivation layer is then formed as a planarization layer on the first electrically insulating layer. The organic SOG layer is then etched-back to define a first etched surface thereon, using a carbon-fluoride gas which also preferably contains argon. The organic SOG layer may even be sufficiently etched back to expose an upper surface of the first electrically insulating layer. The first etched surface is then exposed to an organic compound cleaning agent so that organic residues can be removed from the etched surface so that layers subsequently formed on the etched surface are less susceptible to lift-off and flaking. The organic compound cleaning agents preferably consist of ultraviolet radiation and/or an oxygen containing plasma. After the first etched surface has been cleaned, the first electrically insulating layer is patterned to define a via therein which exposes an underlying portion of the first electrically conductive line. A second electrically conductive line (e.g., second level metallization) is then preferably formed in ohmic contact with the exposed portions of the first electrically conductive line and the ohmic contact therebetween is preferably free of organic residues which might adversely affect contact reliability and resistance.
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Wolf et al., "Silicon Processing for the VLSI Era:Vol. 1-Process Technology", Lattice Press, 1986, p. 564.
Holber, W. et al., "Laser Desorption of Polymer in a Plasma Reactor," Applied Physics Letters, vol. 52, No. 15, Apr. 11, 1988, pp. 1204-1206.
Vines L. B. et al., "Interlevel Dielectric Planarization with Spin-on Glass Films," Proceedings of the International VLSI Multilevel Interconnection Conference, Santa Clara, Jun. 9-10, 1986, pp. 506-515.
Rapport De Recherche, 9706985000, Oct. 16, 1998.
Ko Sung-hoon
Lee Jong-Seob
Park Young-hun
Booth Richard
Samsung Electronics Co,. Ltd.
Zarneke David A.
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