Methods of forming electrical interconnects on integrated circui

Details Methods of forming electrical interconnects on integrated circui Methods of forming electrical interconnects on integrated circui

1997-09-26

1999-09-28

Bowers, Charles

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438626, 438633, 438645, 438631, 438692, 438637, 438627, 438629, H01L 2128

Patent

active

059603178

ABSTRACT:
Methods of forming electrical interconnects include the steps of forming a first electrically conductive layer on a semiconductor substrate and then forming a first electrically insulating layer on the first electrically conductive layer. A second electrically insulating layer is then formed on the first electrically insulating layer. The second electrically insulating layer is then etched to expose the first electrically insulating layer and then a third electrically insulating layer is formed on the first electrically insulating layer. The first and third electrically insulating layers are then etched to define a contact hole therein which exposes a portion of the first electrically conductive layer. A barrier metal layer is then formed. The barrier metal layer is preferably formed to extend on the third electrically insulating layer and on the exposed portion of the first electrically conductive layer. The second electrically conductive layer is then formed to extend on the barrier metal layer and into the contact hole. The second electrically conductive layer and barrier metal layer are then polished in sequence to expose the third electrically insulating layer. The step of polishing the second electrically conductive layer and the barrier metal layer preferably comprises the steps of polishing the second electrically conductive layer and the third electrically insulating layer simultaneously at a first rate and a second rate less than the first rate, respectively, using a first slurry, and then polishing the second electrically conductive layer and the third electrically insulating layer simultaneously at a third rate and a fourth rate greater than the third rate, respectively, using a second slurry.

REFERENCES:
patent: 5494854 (1996-02-01), Jain
patent: 5663102 (1997-09-01), Park
patent: 5783485 (1998-07-01), Ong et al.
patent: 5786275 (1998-07-01), Kubo
patent: 5840625 (1998-11-01), Feldner
patent: 5858875 (1999-01-01), Chung et al.
patent: 5880018 (1999-03-01), Boeck et al.

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