Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reissue Patent
2006-07-26
2010-10-19
Nguyen, Thanh (Department: 2893)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S626000, C438S631000, C438S691000, C438S692000, C438S645000, C438S637000, C438S627000, C438S629000, C257SE21576
Reissue Patent
active
RE041842
ABSTRACT:
Methods of forming electrical interconnects include the steps of forming a first electrically conductive layer on a semiconductor substrate and then forming a first electrically insulating layer on the first electrically conductive layer. A second electrically insulating layer is then formed on the first electrically insulating layer. The second electrically insulating layer is then etched to expose the first electrically insulating layer and then a third electrically insulating layer is formed on the first electrically insulating layer. The first and third electrically insulating layers are then etched to define a contact hole therein which exposes a portion of the first electrically conductive layer. A barrier metal layer is then formed. The barrier metal layer is preferably formed to extend on the third electrically insulating layer and on the exposed portion of the first electrically conductive layer. The second electrically conductive layer is then formed to extend on the barrier metal layer and into the contact hole. The second electrically conductive layer and barrier metal layer are then polished in sequence to expose the third electrically insulating layer. The step of polishing the second electrically conductive layer and the barrier metal layer preferably comprises the steps of polishing the second electrically conductive layer and the third electrically insulating layer simultaneously at a first rate and a second rate less than the first rate, respectively, using a first slurry, and then polishing the second electrically conductive layer and the third electrically insulating layer simultaneously at a third rate and a fourth rate greater than the third rate, respectively, using a second slurry.
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Japanese Office Action Dated Jul. 27, 2010.
Nguyen Thanh
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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