Methods of forming conductive contacts

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S299000, C438S682000, C438S672000, C438S675000

Reexamination Certificate

active

06673715

ABSTRACT:

TECHNICAL FIELD
This invention relates to methods of forming conductive contacts.
BACKGROUND OF THE INVENTION
In semiconductor wafer fabrication, conductive contacts are typically made between different device components and conductive lines. One particular aspect of one form of semiconductor processing, and problems associated therewith, is described with reference to
FIGS. 1-3
.
FIG. 1
depicts a semiconductor wafer fragment
10
comprised of a bulk monocrystalline silicon substrate
12
having a trench isolation region
14
formed therein. Isolation region
14
typically comprises a silicon dioxide comprising material. In the context of this document, the term “layer” refers to both the singular and plural. Further, in the context of this document, the term “semiconductive substrate” or “semiconductor substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other material). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.
Wafer fragment
10
comprises a field effect transistor gate structure
16
having source/drain regions
17
and
18
formed within substrate
12
. Transistor gate structure
16
comprises a gate dielectric layer
20
, an overlying conductively doped polysilicon layer
22
, an overlying conductive silicide region
23
and an overlying insulative cap
24
. Exemplary materials for gate dielectric layer
20
includes silicon dioxide, for silicide layer
23
tungsten silicide, and for insulative cap
24
silicon nitride. Anisotropically etched sidewall spacers
25
are formed laterally about sidewalls of transistor gate structure
16
.
An etch stop layer
26
is formed over transistor gate structure
16
and substrate
12
/
14
. Exemplary typical materials include undoped silicon dioxide, silicon nitride or a silicon oxynitride. The typical thickness of the etch stop layer
26
is 300 Å, with a preferred range of thickness being from 150 Å to 1000 Å. A planarized insulative dielectric layer
28
, for example borophosphosilicate glass (BPSG), is provided over etch stop layer
26
.
Referring to
FIG. 2
, a contact opening
30
has been etched through insulative dielectric layer
28
to substrate
12
. Such would typically be conducted by photolithographic processing providing a layer of photoresist and a mask opening therethrough which provides the exposed area of material
28
for the etch. The illustrated etch is typically referred to as a self-aligned-contact etch as the materials of circuitry construction and the etch chemistry is intended to be largely selective to etch material
28
without necessarily etching transistor gate structure
16
and etch stop layer
26
thereover. The illustrated prior art processing would typically etch material
28
in a manner which is intended to be highly selective to stop at etch stop layer
26
, and etch stop layer
26
would thereafter be etched to provide exposure to source/drain region
18
. Tungsten suicide typically etches faster than silicon.
Although intended to be highly selective and self-aligning, in certain instances the exposed spacer
25
and perhaps some of the insulative cap
24
might be etched as shown to provide some exposure of conductive silicide region
23
. Referring to
FIG. 3
, this is highly undesirable as contact opening
30
is typically ultimately plugged with a conductive material
32
which undesirably creates a fatal short to the conductive silicide of the gate structure.
The invention was principally motivated in overcoming the above-identified problem. However the invention is in no way so limited, and is only limited by the accompanying claims as literally worded and appropriately interpreted in accordance with the Doctrine of Equivalents.
SUMMARY OF THE INVENTION
Methods of forming conductive contacts are described. According to one implementation, the method includes forming a transistor gate structure over a substrate. The gate structure includes a conductive silicide covered by insulative material. A dielectric layer is formed over the substrate and the gate structure. A contact opening is etched into the dielectric layer adjacent the gate structure. After the etching, the substrate is exposed to oxidizing conditions effective to oxidize any conductive suicide within the contact opening which was exposed during the contact opening etch. After the oxidizing, conductive material is formed within the contact opening.
According to one implementation, the method includes forming a transistor gate structure over a substrate. The gate structure includes a conductive suicide covered by insulative material. A dielectric layer is formed over the substrate and the gate structure. A contact opening is then etched into the dielectric layer adjacent the gate structure. After the etching, it is determined whether conductive silicide of the gate structure was exposed during the etching. If it is determined that conductive silicide of the gate structure was exposed during the etching, the exposed silicide within the contact opening is oxidized effective to form an insulative isolation mass within the contact opening on the conductive silicide. After the oxidizing, conductive material is formed within the contact opening and on the insulative isolation mass. If it is determined that conductive silicide of the gate structure was not exposed during said etching, conductive material is formed within the contact opening without conducting said oxidizing.


REFERENCES:
patent: 4443930 (1984-04-01), Hwang et al.
patent: 5356834 (1994-10-01), Sugimoto et al.
patent: 5899742 (1999-05-01), Sun
Merriam Webster's Collegiate Dictionary, the 10thedition, pp 811.

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