Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-12-03
2004-04-20
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S240000, C438S250000, C438S788000
Reexamination Certificate
active
06723599
ABSTRACT:
TECHNICAL FIELD
This invention relates to methods of forming capacitors and to methods of forming capacitor dielectric layers.
BACKGROUND OF THE INVENTION
Capacitors are commonly-used electrical components in semiconductor circuitry, for example in DRAM circuitry. As integrated circuitry density increases, there is a continuing challenge to maintain sufficiently high storage capacitance despite decreasing capacitor area. A typical capacitor is comprised of two conductive electrodes separated by a non-conducting dielectric region. The dielectric region is preferably comprised of one or more materials preferably having a high dielectric constant and low leakage current characteristics. Example materials include silicon compounds, such as SiO
2
, and Si
3
N
4
. Si
3
N
4
is typically preferred due to its higher dielectric constant than SiO
2
.
Numerous capacitor dielectric materials have been and are being developed in an effort to meet the increasing stringent requirements associated with the production of smaller and smaller capacitor devices used in higher density integrated circuitry. Most of these materials do, however, add increased process complexity or cost over utilization of conventional SiO
2
and Si
3
N
4
capacitor dielectric materials.
One dielectric region in use today includes a composite of silicon oxide and silicon nitride layers. Specifically, a first capacitor electrode is formed to have a silicon oxide comprising layer, typically silicon dioxide, of 6 to 10 Angstroms thereover. Such might be formed by deposition, or more typically by ambient or native oxide formation due to oxidation of the first electrode material (for example conductively doped polysilicon) when exposed to clean room ambient atmosphere. Thereafter, a silicon nitride layer is typically deposited by low pressure chemical vapor deposition. This can, however, undesirably produce very small pinholes in the silicon nitride layer, particularly with thin layers of less than 200 Angstroms, with the pinholes becoming particularly problematic in layers of less than or equal to about 75 Angstroms thick. These pinholes can undesirably reduce film density and result in undesired leakage current in operation.
One technique for filling such pinholes is to wet oxidize the substrate, for example at 750° C.-800° C., atmospheric pressure, and feeding 5 slpm H
2
, 10 slpm O
2
for 15-60 minutes. Such forms silicon oxide material which fills the pinholes and forms a silicon oxide layer typically from about 5 Angstroms to about 25 Angstroms thick over the silicon nitride. It is generally desirable, however, to overall minimize the thermal exposure of the wafer/substrate upon which integrated circuitry is being fabricated. Exposure to 750° C.-800° C. for from 15 minutes-60 minutes is significant in this regard.
SUMMARY
The invention includes methods of forming capacitors and methods of forming capacitor dielectric layers. In one implementation, a method of forming a capacitor dielectric layer includes forming a silicon nitride comprising layer over a substrate. The substrate with silicon nitride comprising layer is provided within a chamber. An oxygen comprising plasma is generated remote from the chamber. The remote plasma generated oxygen is fed to the substrate within the chamber at a substrate temperature of no greater than 750° C. effective to form a silicon oxide comprising layer over the silicon nitride comprising layer.
In one implementation, a method of forming a capacitor includes forming first capacitor electrode material comprising silicon over a semiconductor substrate. A silicon nitride comprising layer is formed over the first capacitor electrode material. The silicon nitride comprising layer has pinholes formed therein. The semiconductor substrate with silicon nitride comprising layer is provided within a chamber. An oxygen comprising plasma is generated remote from the chamber. The remote plasma generated oxygen is fed to the semiconductor substrate within the chamber at a substrate temperature of no greater than 550° C. and for no longer than 30 seconds effective to form a silicon oxide comprising layer over the silicon nitride comprising layer and effective to fill said pinholes with silicon oxide. The chamber is essentially void of hydrogen during the feeding. After the feeding, a second capacitor electrode material is formed over the silicon oxide comprising layer.
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U.S. patent application Ser. No. 09/653,281, Beaman et al., filed Aug. 30, 2000.
Laughery et al.,Effect of H2Content on Reliability of Ultrathin In-Situ Steam Generated(ISSG) SiO221 IEEE Electron Device Letters No. 9, 430-432 (Sep. 2000).
Beaman Kevin L.
Eppich Denise M.
Micro)n Technology, Inc.
Nguyen Tuan H.
Wells St. John P.S.
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