Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-03-25
2008-03-25
Tran, Minhloan (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21646, C257SE21084, C257S906000, C438S387000, C438S253000
Reexamination Certificate
active
11053816
ABSTRACT:
The invention includes methods of electrochemically treating semiconductor substrates. The invention includes a method of electroplating a substance. A substrate having defined first and second regions is provided. The first and second regions can be defined by a single mask, and accordingly can be considered to be self-aligned relative to one another. A first electrically conductive material is formed over the first region, and a second electrically conductive material is formed over the second region. The first and second electrically conductive materials are exposed to an electrolytic solution while providing electrical current to the first and second electrically conductive materials. A desired substance is selectively electroplated onto the first electrically conductive material during the exposing of the first and second electrically conductive materials to the electrolytic solution. The invention also includes methods of forming capacitor constructions.
REFERENCES:
patent: 4638400 (1987-01-01), Brown et al.
patent: 6140234 (2000-10-01), Uzoh et al.
patent: 6171952 (2001-01-01), Sandhu et al.
patent: 6197181 (2001-03-01), Chen
patent: 6200433 (2001-03-01), Ding et al.
patent: 6255187 (2001-07-01), Horii
patent: 6281142 (2001-08-01), Basceri et al.
patent: 6291332 (2001-09-01), Yu et al.
patent: 6326559 (2001-12-01), Yoshioka et al.
patent: 6355153 (2002-03-01), Uzoh et al.
patent: 6503791 (2003-01-01), Matsui et al.
patent: 6703272 (2004-03-01), Taylor et al.
patent: 6787460 (2004-09-01), Lee et al.
patent: 6984301 (2006-01-01), Collins et al.
patent: 7014749 (2006-03-01), Redepenning
patent: 2001/0036746 (2001-11-01), Sato et al.
patent: 2001/0055851 (2001-12-01), Horii
patent: 2002/0048870 (2002-04-01), Lane
patent: 2002/0074584 (2002-06-01), Yang
patent: 2002/0192953 (2002-12-01), Wang et al.
patent: 2004/0043559 (2004-03-01), Srividya et al.
patent: 2004/0266130 (2004-12-01), Wang
patent: 2006/0246677 (2006-11-01), Taylor et al.
patent: 0 930 647 (1999-07-01), None
patent: 1 167 585 (2002-01-01), None
patent: 5-243222 (1993-09-01), None
patent: 2003-31688 (2003-01-01), None
patent: WO 01/20647 (2001-03-01), None
WEBSITE: http://www.answers.com/topic
oble-metal. to find general definition of noble metal material, reprinted Jan. 10, 2006, 4 pgs.
WEBSITE: http://on.wikipedia.org/wiki/Electrolysis, to find general process of electrolysis, reprinted Jan. 10, 2006, 3 pgs.
PCT/US03/21637; Filed Oct. 2003; Search Report; 10 pp.
Collins Dale W.
Klein Rita J.
Lane Richard H.
Bomkamp Eric A
Micro)n Technology, Inc.
Tran Minhloan
Wells St. John P.S.
LandOfFree
Methods of forming capacitor constructions does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods of forming capacitor constructions, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods of forming capacitor constructions will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3933105