Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Self-aligned
Patent
1998-03-24
1999-11-30
Monin, Jr., Donald L.
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Self-aligned
438367, 438368, 438371, 257565, 257588, H02L 21265
Patent
active
059941960
ABSTRACT:
Methods of forming bipolar junction transistors include the steps of forming a semiconductor substrate having a highly doped buried collector region therein and an intrinsic collector region extending from the buried collector region to a face of the semiconductor substrate. A first electrically insulating layer and first polysilicon layer are formed on the face. Separate masking and ion implantation steps are then performed to convert the first polysilicon layer into a highly doped first portion of first conductivity type and a highly doped second portion of second conductivity type. The first conductive layer may be patterned to define the emitter contact and base contact and expose the intrinsic collector region. A thin sacrificial polycrystalline silicon layer may be formed on the exposed intrinsic collector region and then intrinsic base region dopants of second conductivity type may be implanted through the thin sacrificial layer and into the intrinsic collector region to define an intrinsic base region therein. Conductive emitter contact and base contact spacers are then formed on the sidewalls of the emitter contact and base contact, respectively. A step is then performed to simultaneously diffuse the dopants implanted into the emitter and base contacts, through the spacers and into the intrinsic base region. Here, the implanted dopants of first conductivity type are diffused from the emitter contact through the corresponding conductive sidewall spacer and into the semiconductor substrate to define an emitter region in the intrinsic base region. Similarly, the implanted dopants of second conductivity type are diffused from the highly doped base contact through the corresponding conductive sidewall spacer and into the semiconductor substrate to define a more highly doped extrinsic base region in a more lightly doped intrinsic base region.
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Dietrich Michael
Monin, Jr. Donald L.
Samsung Electronics Co,. Ltd.
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