Methods of forming a P-well in an integrated circuit device

Details Methods of forming a P-well in an integrated circuit device Methods of forming a P-well in an integrated circuit device

2007-09-25

2007-09-25

Pham, Thanhha S. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S228000, C257SE21630, C257SE21644

Reexamination Certificate

active

10899596

ABSTRACT:
The present invention is generally directed to a method of forming a p-well in an integrated circuit device. In one illustrative embodiment, the method comprises forming a first layer of epitaxial material above an active layer of a substrate, forming a first doped region in the first layer of epitaxial material, forming a second layer of epitaxial material above the first layer of epitaxial material, forming a second doped region in the second layer of epitaxial material, and performing at least one heat treating process.

REFERENCES:
patent: 6309945 (2001-10-01), Sato et al.
patent: 6692982 (2004-02-01), Takahashi et al.

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