Methods of fabricating surrounded-channel transistors with...

Details Methods of fabricating surrounded-channel transistors with... Methods of fabricating surrounded-channel transistors with...

2008-07-08

2008-07-08

Weiss, Howard (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S924000, C257SE21442

Reexamination Certificate

active

11095969

ABSTRACT:
An elongate stacked semiconductor structure is formed on a substrate. The stacked semiconductor structure includes a second semiconductor material region disposed on a first semiconductor material region. The first semiconductor material region is selectively doped to produce spaced-apart impurity-doped first semiconductor material regions and a lower dopant concentration first semiconductor material region therebetween. Etching exposes a portion of the second semiconductor material region between the impurity-doped first semiconductor material regions. The etching removes at least a portion of the lower dopant concentration first semiconductor material region to form a hollow between the substrate and the portion of the second semiconductor material region between the impurity-doped first semiconductor material regions. An insulation layer that surrounds the exposed portion of the second semiconductor material region between the impurity-doped first semiconductor material regions is formed. The hollow may be filled with a gate electrode that completely surrounds the exposed portion of the second semiconductor material region, or the gate electrode may partially surround the exposed portion of the second semiconductor material region and an insulation region may be formed in the hollow.

REFERENCES:
patent: 6396108 (2002-05-01), Krivokapic et al.
patent: 6605847 (2003-08-01), Kim et al.
patent: 7144820 (2006-12-01), Sung
patent: 2002-151688 (2002-05-01), None
patent: 2002-270850 (2002-09-01), None

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