Methods of fabricating semiconductor devices

Details Methods of fabricating semiconductor devices Methods of fabricating semiconductor devices

2007-06-12

2007-06-12

Lee, Hsien-Ming (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S223000, C438S230000, C438S231000, C438S232000

Reexamination Certificate

active

11027513

ABSTRACT:
Methods of fabricating CMOS transistors are disclosed. A disclosed method includes forming first and second gate patterns on the first and second wells, respectively; forming a sidewall insulating layer over the substrate; forming first lightly doped regions in the first well by NMOS LDD ion implantation; forming a first gate spacer insulating layer over the substrate; forming second lightly doped regions in the second well by PMOS LDD ion implantation; sequentially stacking a spacer insulating layer and a second gate spacer insulating layer on the first gate spacer insulating layer; forming first and second spacers on sidewalls of the first and second gate patterns; and forming first and second heavily doped regions in the first and second wells by NMOS and PMOS source/drain ion implantations, respectively.

REFERENCES:
patent: 5753556 (1998-05-01), Katada et al.
patent: 6333249 (2001-12-01), Kim et al.
patent: 6624014 (2003-09-01), Hsien
patent: 2004/0023478 (2004-02-01), Samavedam et al.
patent: 2005/0026342 (2005-02-01), Fung et al.
patent: 2006/0068541 (2006-03-01), Chidambaram et al.

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